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Effects of N-Rich TiN Capping Layer on Reliability in Gate-Last High-k/Metal Gate MOSFETs

Monday, October 28, 2013: 08:10
Union Square 22, Tower 3, 4th Floor (Hilton San Francisco Union Square)
Kidan Bae , Samsung Electronics Co.
Kyung Taek Lee , Samsung Electronics Co.
Hyun Chul Sagong , Samsung Electronics Co.
Minhyeok Choe , Samsung Electronics Co.
Hyunwoo Lee , Samsung Electronics Co.
Sungeun Kim , Samsung Electronics Co.
Kwang-Soo Kim , Samsung Semiconductor Institute of Technology, Yongin-si, Gyeonggi-do, South Korea
Junekyun Park , Samsung Electronics Co.
Sangwoo Pae , Samsung Electronics Co.
Jongwoo Park , Samsung Electronics Co., Gyeonggi-Do, South Korea

Abstract:

See more of: Defects, Traps, and Reliability
See more of: E10: Semiconductors, Dielectrics, and Metals for Nanoelectronics 11
See more of: Dielectric and Semiconductor Materials, Devices, and Processing
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