Heterogeneous Integration of Plasmonics with Si-Photonics & Microelectronics for High-Performance Optical Routing
In tems of of today’s Peta-flop High-Performance Computing (HPC) applications the size and power consumption appear to be critical issues, signifying that new technological and architectural considerations are required in order to be able to move towards Exascale-computing powers. Whereas silicon photonics emerges as a powerful technology for low-loss and high bandwidth optical connectivity in integrated circuit environments, servers and network switches are already consolidating into high-density blade enclosures in order to reduce space and cooling requirements. These considerations determine additional tasks for switching infrastructures of miniature data networks: the next generation of routing circuitry has to provide high throughput capabilities while keeping in line with the requirements of small foot-print, low power consumption and low latency. Here, next generation computing architectures are needed with ultra low power consumption; ultra high performance with novel photonic interconnection technologies. The objective of the recently proposed high bandwidth photonics interconnection layer for converged microsystems using System-in-Package Technology, is to develop a CMOS compatible underlying technology to enable next generation optical computing architectures.
We present within the framework of EU-PLATON project a photonic integrated system-in-package platform for Tb/s optical routing, where three different technologies, silicon photonics, plasmonics and electronics are merged. Compatibility between various components has to be ensured to allow for their seamless interfacing and interoperability. The 4x4 router architecture exploits a SOI platform employing 340x400nm2 waveguide structures and hosting four 7:1 SOI multiplexing circuits, four photodiodes, an electronic IC control circuit and the 4x4 dielectric-loaded surface plasmon-polariton (DLSPP)-based switching matrix.