Effect of Grain Growth Control by Atmospheric Micro-Thermal- Plasma-Jet Crystallization of Amorphous Silicon Strips on TFT Characteristics

INTRODUCTION.For large area electronics on glass substrate, improvement of thin film transistor (TFT) performance is a key technological issue because higher resolution and functionality, such as 500 pixels per inch (ppi) displays, are required. Low temperature poly-silicon (LTPS) technology is quite promising in terms of high mobility (μ_FE), high reliability and CMOS capability. However, present LTPS technology, based excimer laser annealing (ELA) technique, must solve the cost and variability issues. We have proposed micro-thermal-plasma-jet (µ-TPJ) technique for crystallization of amorphous silicon (a-Si) films [1]. Because of its simple structure and atmospheric pressure process, µ-TPJ enables low cost fabrication compared with ELA technique. We have demonstrated zone-melting recrystallization (ZMR) of a-Si by µ-TPJ irradiation [2]. However, ZMR forms random grain boundaries (GBs), which cause characteristic variability in TFTs. To solve these issues, we have attempted to control the grain growth by µ-TPJ crystallization of a-Si strip pattern and demonstrated CMOS circuit operation with high integrity and high frequency for peripheral circuit of displays [3]. In this work, we investigated in detail characteristics of TFTs with conventional and strip pattern.

EXPERIMENTAL. A 200-nm-thick a-Si films were formed on quartz substrate and were patterned to form source, drain and channel. Then, 3×10¹²/cm² phosphorus ions and boron ions were implanted in PMOS and NMOS respectively, because non-doped channel behaved as intrinsic P-type nature by this fabrication process [3]. After dehydrogenation at 450 °C, a-Si patterns were crystallized by µ-TPJ irradiation. In this condition, ~200 μm wide molten zone is formed and rapid re-crystallization to lateral direction is induced by the fast movement of molten Si. Here, we formed conventional and 1μm wide strip channel patterns before crystallization. After fabrication process [3], we compared electrical property and channel crystallinity. Crystallographic orientations and GBs were investigated by electron backscattering diffraction (EBSD) method. And TFT characteristics with respect to channel width (W) of both patterns were investigated.

RESULTS AND DISCUSSION. In conventional pattern TFT, reduced field effect mobility (μ_FE) and threshold voltage (V_th) shift with respect to W were observed (Fig.1 (a)). On the other hand, strip pattern showed stable characteristics in all W (Fig.1 (b)). As shown in Fig.2, random GB were formed in W>3µm, but were clearly suppressed in narrow strips. In addition, strip pattern suppressed off leak current and showed high on current compared to conventional pattern. While μ_FE and V_th varied by increasing of W in conventional pattern, stable characteristics of μ_FE > 350 cm²/Vs, V_th = 3.6 ± 0.1V and outputs were obtained in strip pattern. In consideration of drawback of area loss by strip pattern, high μ_FE, low V_th and stable outputs are sufficient to compensate it as understood by the output characteristics (Fig.3). In addition, although the kink effect increased by degradation of V_th in conventional pattern (Fig.3 (a)), they were significantly suppressed in strip pattern by its uniformity of V_th(Fig.3 (b)). Thus, strip pattern is quite promising for layout and operation of CMOS circuit with high reliability.

CONCLUSIONS.The µ-TPJ irradiation to a-Si strip pattern is quite effective for grain growth control. TFTs with proposed pattern showed high performance and low characteristics variability. This enabled us to operate CMOS circuit on insulating substrate under low supply voltage and high frequency.

ACKNOWLEDGEMENTS.

A part of this work was supported by Research Institute for Nanodevice and Bio Systems (RNBS), Hiroshima University and Funding Program for Next Generation World-Leading Researchers (NEXT Program) from the Japan Society for the Promotion of Science (JSPS).

REFERENCES.

[1] S. Hayashi, et al., Appl. Phys. Express 3(2010) 061401.

[2] Y. Fujita, et al., Jpn. J. Appl. Phys. 51(2012) 02BH05.

[3] S. Morisaki, et al., 10^th Int. Thin-Film Transistor Conf. (2014) 15.