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Overcoming High Performance Semiconductor Packaging Challenges Using Plasma

Tuesday, 7 October 2014: 10:40
Expo Center, 1st Floor, Universal 5 (Moon Palace Resort)
D. Foote (Nordson March)
Moore’s Law has been the driving force of front end semiconductor technology development for over 40 years and is finally meeting its match.  Technology demands, though, will not allow a slow down so the back end packaging technology needs to pick up the slack.  Packaging technologies are now more like the front end chip technologies of 30 years past.  Thirty years ago plasma processing was at best at the toddler stage in front end fabs while commonplace now.  Thirty years hence plasma is at a similar stage in the back end packaging arena.  Plasma processing enables the high performance packages required today.

Plasma is useful for both the manufacturing process of the packages as well as in the assembly of the package.  High density interconnect assemblies are build on printed circuit assemblies that have had plasma processing to enhance adhesion between laminate layers as well as cleaning the through holes prior to plating.

Wafer level packaging is melding the front and back ends and plasma processing is enabling.  The dimensional requirements are still such that high performance front end plasma processing techniques are not required but moving from the era of mils to microns does demand high performance from the plasma processing tool.  Useful plasma processes for WLP include resist descum and strip, pre-bump cleaning and copper stud oxide reduction.

Optimized plasma processes enable three dimensional packaging technologies that are both useful and reliable.  Flip chip packaging is becoming the norm at the leading edge and plasma enables better bondability and more reliable packages.  Likewise plasma pre-treatment prior to wire bonding enables more robust and reliable bonds.  Proper treatment levels enable robust bonds even on advanced packages of today with very thin metal stack for bonding.  Plasma treatments are also useful for silicon stress reduction following wafer thinning and/or dicing.

Specific application examples will be presented showing the many uses and benefits of plasma processing for semiconductor packaging.