Fabrication and Performance of 16-kV Ultrahigh-Voltage SiC Power Devices

For the realization of a low-carbon-emission society and in terms of energy security, the grid connections of electric power systems are highly desired by applying a smart grid and high voltage DC transmission systems (HVDC). If switching devices with a break down voltage (BV) greater than 10kV are realized, it would be extremely beneficial for the reduction in size and loss of the power electronics components such as a loop power controller (LPC), a static synchronous compensator (STATCOM), and an intelligent solid state transformer (SST). Silicon carbide (SiC) is expected to be a next-generation power semiconductor material because its band gap is three times larger than that of Si. The breakdown electric field of SiC is 10 times higher than that of Si, allowing the thickness of the drift layer in SiC power devices to be 1/10 that of Si power devices. Thus, if an insulated-gate bipolar transistor (IGBT) structure of SiC is used, it will be possible to realize more than 10 kV MOS-controlled switching devices with very low on-resistance [1, 2].

We have been working on a SiC p-channel IGBT with a BV of 10 kV [4] as well as a PiN diode with a BV of 13 kV [5]. For these devices, a high-quality n⁺⁺ substrate could be used for device fabrication. However, the crystal quality of the p⁺⁺ SiC substrate for the purpose of fabricating an n-channel IGBT is currently very poor with a high micropipe density and high resistivity using it as a collector. Moreover, the channel mobility for a SiC-MOSFET is still very low compared with that of a Si-MOSFET because of its 10-times higher interface-state density (D_it).

To solve these problems related to n-channel SiC-IGBTs, we employed a heavily doped epitaxial p⁺⁺ layer as a substrate and an implantation and epitaxial MOSFET (IEMOSFET) [5, 6] as a MOSFET structure, which is called a flip-type IE-IGBT. For the substrate, we attempted to fabricate a flip-type wafer utilizing a p⁺⁺ epitaxial layer as a substrate [1]. First, a 150-mm-thick n^–-type drift layer was grown on the Si-face n⁺⁺ substrate after a buffer layer was formed. After the p⁺ collector layer was grown, the p⁺⁺ substrate layer was grown to a thickness greater than 200 µm. Then, we removed the n⁺⁺ substrate, turned the substrate over, and polished the surface using the CMP process. To overcome the low channel mobility of the SiC-MOSFETs, we proposed the IEMOSFET utilizing the 4H-SiC (000-1) carbon face, which has a high channel mobility greater than 100 cm²/(Vs) [6]. The bottom and top of the p-well of the IE-MOSFET are formed by ion implantation and epitaxial growth, respectively. The smooth surface of the top of the p-well enables high channel mobility. A TCAD simulation was employed to optimize the design of the active area and edge termination to obtain a low forward-voltage drop (V_f) and an ultrahigh breakdown voltage. 

As a result, we successfully fabricated an IE-IGBT with a low V_f of 5.0 V at 100 A/cm² with a BV greater than 16 kV [7]. At the same time, we achieved good threshold voltage (V_th) stability and a low current-density dependence on the temperature. An ultrahigh-voltage power module was assembled to evaluate the dynamic behavior of the IE-IGBT and consisted of a tungsten base plate, a DBC base with Si₃N₄on it, and a copper electrode. The dynamic switching performance of the combination of the ultrahigh-voltage IE-IGBT and PiN diode will be presented.

[1]     X. Wang, J. A. Cooper, IEEE Transactions on Electron Devices Vol. 57, No. 2, pp. 511-515, (2010)

[2]     S. H. Ryu, L. Cheng, S. Dhar, C. Capell, C. Jonas, J. Clayton, M. Donofrio, M. J. O’Loughlin, A. A. Burk, A. K. Agarwal, J. W. Palmour, Materials Science Forum Vols. 717-720, p. 1135 (2012)

[3]     S. Katakami, H. Fujisawa, K. Takenaka, H. Ishimori, S. Takasu, M. Okamoto, M. Arai, Y. Yonezawa, K. Fukuda, Materials Science Forum Vols. 740-742, p. 958 (2013)

[4]     D. Okamoto, Y. Tanaka, N. Matsumoto, M. Mizukami, C. Ota, K. Takao, K. Fukuda, H. Okumura, Materials Science Forum Vols. 740-742, p. 907 (2013)

[5]     K. Fukuda, M. Kato, J. Senzaki, K. Kojima, Appl. Phys. Lett. Vol. 84 p. 2088 (2004)

[6]     S. Harada, M. Kato, K. Suzuki, M. Okamoto, T. Yatsuo, K. Fukuda, K. Arai, Technical Digest of IEDM p. 903, (2006)

[7]     Y. Yonezawa et al., “Low V_f and highly reliable 16 kV ultrahigh voltage SiC flip-type n-channel implantation and epitaxial IGBT”, in Proceedings of International Electron Devices Meeting (IEDM), 2013, pp. 6.6.1–6.6.4.