1973
Stacking Fault Formation during Homo-Epitaxy of 4H-SiC

Tuesday, 7 October 2014: 08:40
Expo Center, 1st Floor, Universal 20 (Moon Palace Resort)
H. Wang, F. Wu, Y. Yang, J. Guo, B. Raghothamachar, M. Dudley (Stony Brook University), J. Zhang, G. Chung, B. Thomas, E. K. Sanchez, S. Mueller, D. Hansen, and M. Loboda (Dow Corning Compound Semiconductor Solutions)
Nomarski optical microscopic observations are presented faint needle-like surface morphological features in 4H-SiC homoepitaxial layers.  Close observation has revealed that these linear features often occur in pairs, composing triangles or trapezoids. Grazing incidence synchrotron white beam x-ray topographs recorded from the areas containing the linear features show V and Y shaped features which transmission topographs reveal to be ¼[0001] Frank-type stacking faults. Geometric analysis of the size and shape of these faults indicates that they are fully contained within the epilayer and appear to be nucleated at the substrate/epilayer interface. Detailed analysis shows that the positions of the V shape stacking faults match with the positions of c-axis threading dislocations with Burgers vectors of c or c+a in the substrate and thus appear to result from the deflection of these dislocations during epilayer growth. Similarly, the Y shaped defects match well with the substrate surface intersections of c-axis threading dislocations with Burgers vectors of c or c+a in the substrate which were deflected onto the basal plane during substrate growth.  The observed morphology of these defect configurations allows us to propose a model for their formation mechanism.  For the V shaped defects, this is based on the overgrowth of the surface spiral steps associated with the surface intersections of the threading dislocations. For the Y shaped defects this is based on overgrowth of the special configurations of steps at the surface intersections of the threading dislocations that were deflected onto the basal plane during substrate growth. Understanding the mechanism of formation of these stacking faults can enable the formulation of strategies for their elimination in order to mitigate their potentially detrimental influence on high power device performance.