Device Technology - I

Tuesday, 26 May 2015: 11:00-12:00
Williford Room B (Hilton Chicago)
Jean-Pierre Raskin and Bich-Yen Nguyen
(Invited) High Performance III-V-on-Insulator MOSFETs on Si Realized by Direct Wafer Bonding Applicable to Large Wafer Size
S. Takagi, S. H. Kim, Y. Ikku, M. Yokoyama (The University of Tokyo, JST-CREST), R. Nakane (The University of Tokyo), J. Li, Y. C. Kao (IntelliEPI, Inc.), and M. Takenaka (The University of Tokyo, JST-CREST)
(Invited) 14nm FDSOI Technology for High-Speed and Energy-Efficient CMOS
O. Weber (CEA-LETI), E. Josse, and M. Haond (STMicroelectronics)