834
(Invited) The Assessment of Border Traps in High-Mobility Channel Materials
It is the intension of this work to illustrate the 1/f noise method for oxide trap profiling in high-mobility channel devices with a high-k gate stack. As shown in Fig. 3 for InGaAs/InP/Al2O3 nMOSFETs, quite uniform trap density profiles have been obtained, irrespective of the architecture, i.e., buried channel with InP cap or surface channel (InP etched) or the use of surface passivation with S [4]. On the other hand, the absolute value of the trap density strongly depends on pre- and post-high-k deposition treatments. While there is quite some literature on the LF noise of Ge pMOSFETs with silicon passivation, little results have been reported on alternative gate stacks or n-channel Ge MOSFETs. As shown in Fig. 4, the noise spectrum for a Ge nMOSFET with GeOx/Al2O3/HfO2 gate stack is close to 1/f, yielding a uniform profile, according to the constant fxSI function. It corresponds with a high NBT in the range of 6×1019 cm-3 eV-1, indicating a rather poor gate stack quality [5]. Finally, the impact of inelastic tunneling in the modeling of BT profiles from 1/f noise spectra will be discussed and a possible internal depth versus frequency calibration will be outlined [6].
References
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[2] D. Lin et al., in IEDM Tech. Dig., The IEEE (New York), pp. 645-648 (2012).
[3] E. Simoen, H.-C. Lin, A. Alian, G. Brammertz, C. Merckling, J. Mitard and C. Claeys, IEEE Trans. Device and Mater. Reliability, 13, pp. 444-455 (2013).
[4] M. Scarpino, S. Gupta, D. Lin, A. Alian, F. Crupi, and E. Simoen, IEEE Electron Device Lett., 35, pp. 720-722 (2014).
[5] W. Fang, E. Simoen, H. Arimura, J. Mitard, S. Sioncke, H. Mertens, A. Mocuta, N. Collaert, J. Luo, C. Zhao, A. Thean, and C. Claeys, submitted for publication in IEEE Trans. Electron Devices.
[6] E. Simoen, J.W. Lee and C. Claeys, IEEE Trans. Electron Devices, 61, pp. 634-637 (2014).