Increase in Oxide Trap Density Due to the Implementation of High-k and Al2O3 Cap Layers in Thick-Oxide Input-Output Transistors for DRAM Applications
P-channel transistors have been processed on 300 mm wafers following the conditions of Table 1, with 5 nm SiO2 + polysilicon gate as a reference. The Al2O3 cap is deposited on top of the gate stack. LF noise measurements have been performed on 1 mm×0.170 mm area devices in linear operation (drain-to-source voltage VDS=-0.05 V) with the gate voltage VGS stepped from weak to strong inversion. As shown in Fig. 1, the spectra are typically 1/f-like, with occasionally excess Lorentzian noise components. It is also clear, however, that the frequency exponent is not constant in the studied frequency range from 3 Hz to 100 kHz. It will be shown that the 1/f noise is due to number fluctuations, i.e., is caused by trapping in the gate oxide. From Fig. 2, one can derive that the average input-referred voltage noise PSD (<SVG>) at 10 Hz (Fig. 2a) or 10 kHz (Fig. 2b) strongly depends on the process conditions, with the reference wafer showing at least one decade lower values. Using the formulas in Fig. 3, on can convert the 1/f spectra into an oxide trap density profile, showing a strong increase as soon as a high-k layer is present. The increase in trap density points to an in-diffusion of Hf and Al down to the Si/SiO2 interface, while the reference trap densities are typical for SiO2. It will, finally, be shown that there exists a good agreement between the trend in the oxide trap density derived from 1/f noise spectra and the Negative Bias Temperature Instability (NBTI) of similar p-channel devices. It is clear that for optimizing the quality and reliability of I/O transistors, one should suppress this in-diffusion.
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