Oxide based resistive switching memory are the promising candidates for future non-volatile memory according to fast programing, low power operation, scalability and compatibility to the current CMOS process. Among, SiO_x single layer resistive switching devices have been widely studied and characterized. The SiO_x single layer resistive memory has good compatibility to CMOS fabrication process. However, it can only be programmed under the vacuum or non-oxidized ambient. Also, the previous results reported on SiO_x-based memristors indicate that the electroforming and programming voltage is relatively higher than the other dielectric materials and obstructed for low-power applications. In this work, by using SiO_x/HfO_x stacking engineering, we have developed a low-voltage operation (< 2V) for SiO_x-based ReRAM. The results show that with HfO_x (3nm) on bottom, the metal-insulator-semiconductor (MIS) structures exhibit resistive switching at low voltage (<2V) and operation in air atmosphere. The added hafnium layer apparently provides the source of proton exchange reaction with conduction bandgap offset reduction for low-voltage (< 2V) RS (Figure 2). Also, we have studied single HfO_x-based MIS devices which exhibit bipolar-type resistive switching behaviors with small memory window.Clearly, SiO_x/HfO_x stacking optimization not only maintains the RS behaviors even in air environment without any programming window degradation, but also further reduces the switching voltage below 2V.

Figure 1 shows the results of three different structures, including SiO_x single layer memristor, SiO_x/HfO_x bilayer memristor and HfO_x single layer memristor. In terms of operation environment condition, inserting the HfO_x layer would help the SiO_x memristor to be able to programmed either under a pressure  of 1E-4 torr or in the atmosphere. The HfO_x single layer memristor has the lowest electroforming voltage of 2.3 V, and which in SiO_x/HfO_x stacks has been reduced significantly to 5 V comparing which of 14 V for SiO_x single layer. For the SiO_x/HfO_x bilayer, a memory window of 4 decades is achieved and comparable to that of SiO_x single layer, and larger than that of single layer HfO_x by 2 decades. In terms of operation voltage, the set voltage is reduced from 4V to 2 V and the reset voltage is also suppressed significantly from 10 V to 0.3 V by inserting the 3 nm HfO_x layer.

Figure 2 shows the TEM images of both SiO_x single layer memristor and SiO_x/HfO_x bilayer memristor. The 3 nm HfO_x was deposited on N+ Si wafer at 250 ^oC by atomic layer deposition followed by 30 nm SiO₂ deposition using e-beam evaporator and 160 nm TaN depositing by sputtering.

Figure 3. The single layer HfOx-based MIS devices resistive switching behaviors. (a) The electroforming process, resistive switching behaviors in 20 times cycling. (b) The switching voltage (SET/RESET) and states (HRS/LRS) distribution.