New Device Architectures

Monday, 30 May 2016: 10:00-12:20
Indigo 206 (Hilton San Diego Bayfront)
Chair:
Kuniyuki Kakushima
10:40
Introduction of a High Selectivity Etching Process with Advanced SiNx Etch Gas in the Fabrication of FinFET Structures
T. Kojiri, T. Suwa, K. Hashimoto, A. Teramoto, R. Kuroda, and S. Sugawa (Tohoku University)
11:00
(Invited) Vertical Nanowire FET Integration and Device Aspects
A. Veloso, E. Altamirano-Sánchez, S. Brus, B. T. Chan, M. Cupak, M. Dehan, C. Delvaux, K. Devriendt, G. Eneman, M. Ercken, T. Huynh-Bao, T. Ivanov, P. Matagne, C. Merckling, V. Paraschiv, S. Ramesh, E. Rosseel, L. Rynders, A. Sibaja-Hernandez, S. Suhard, Z. Tao, E. Vecchio, N. Waldron, D. Yakimets, K. De Meyer (Imec), D. Mocuta, N. Collaert, and A. Thean (imec, Belgium)
11:40
(Invited) Evaluation of Stacked Nanowires Transistors for CMOS: Performance and Technology Opportunities
L. Gaben (STMicroelectronics, Crolles, France, CEA-LETI MINATEC Campus), S. Barraud (CEA-LETI MINATEC Campus), M. P. Samson (STMicroelectronics, Crolles, France), M. A. Jaud, S. Martinie, O. Rozeau, J. Lacord (CEA-LETI MINATEC Campus), C. Arvet (STMicroelectronics, Crolles, France), C. Vizioz (CEA-LETI MINATEC Campus), J. Bustos (STMicroelectronics, Crolles, France), J. A. Dallery (VISTEC ELECTRON BEAM GmbH), S. Pauliac, V. Balan, C. Euvrard-Colnat, C. Perrot, V. Loup (CEA-LETI MINATEC Campus), P. Besson (Univ. Grenoble Alpes), J. M. Hartmann (Univ. Grenoble Alpes, CEA-LETI, MINATEC Campus), S. Monfray, F. Boeuf, T. Skotnicki (STMicroelectronics), F. Balestra (Grenoble INP-Minatec/CNRS), and M. Vinet (CEA-LETI MINATEC Campus)