The 2D electrolyte comprises cobalt crown ether phthalocyanine (CoCrPc) and lithium perchlorate (LiClO4) (Fig.1 (a)). CoCrPc is an atomically thin, flat-laying and electrically insulating material (band gap ~1.34 eV).4 An ordered array of CoCrPc can be deposited on a 2D material by simple drop-casting and annealing.4 Each of the four crown ethers in a molecule can solvate one Li+.5 In this study, we demonstrate that the Li+ location with respect to the crown ether can be modulated by a gate bias to induce image charges in MoS2, which leads to n-type doping with sheet carrier density of ~1012 cm-2. Back-gate MoS2 FETs were fabricated by electron beam lithography (EBL) and a monolayer of CoCrPc was deposited by drop-casting and annealing (Fig.1 (b)). Atomic force microscopy (AFM) was used to confirm the thickness of the electrolyte as 0.5 ~ 0.7 nm, corresponding to a monolayer. Because a single monolayer of 2D electrolyte must be deposited on the channel surface, it is critical for the channel to be free of EBL resist residue, otherwise the residue will interfere with the packing arrangement of the 2D electrolyte. Contact-mode AFM was used to remove the residue before electrolyte deposition; surface roughness after the cleaning equals that of the freshly exfoliated flakes (Rq ~0.23 nm). Importantly, the cleaning does not degrade the device performance as indicated by transfer measurements (IDS-VBG) taken before and after cleaning. FET transfer characteristics after 2D electrolyte deposition showed bistability of the 2D electrolyte (Fig 1. (c) and (d)), with the extent of n-type doping depending on the magnitude of the applied bias, and the direction of the doping (i.e., more or less n-type) depending on the polarity of the applied bias. The threshold voltage shift of ~10 V corresponds to a sheet carrier density of 3.2×1012 cm-2 at a CE: Li+ ratio of 5:1, which is about 2 orders of magnitude greater than the intrinsic MoS2 carrier density (~1×1010 cm-2).6 The measurement also show that the channel resistance can be maintained at two distinct values after the bias is removed for at least the timescale of the transfer measurement.
DFT calculations by Kyeongjae Cho group at UT Dallas predict that the gate bias required for Li+ to pass through the crowns is sub-volt, which is desirable for power efficient electronics.7 However, the back-gate MoS2 devices require a large gate bias to modulate the location of the Li+because of electric field loss through the 90 nm back-gate oxide. Therefore, a future goal is to demonstrate sub-volt operation in top-gate FETs doped by the 2D electrolyte. In summary, this study demonstrates that an electrolyte can be scaled to 2D and used for the adjustable doping of 2D semiconductors with state retention in the absence of an applied gate bias.
Acknowledgments
This work was supported by NSF-ECCS/GOALI 1408425 and by the Center for Low Energy Systems Technology (LEAST), a STARnet Semiconductor Research Corporation program sponsored by MARCO and DARPA.
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