The development of a number of C-face MOSFETs has revealed that there are opposite types of C-face MOSFETs with quite different Vth instabilities . We classified them into “good type” and “bad type,” depending on their Vth instabilities. The “bad-type” MOSFETs commonly showed a large Vth shift; the drain-current (Id) versus gate-voltage (Vg) curve was horizontally shifted toward the negative direction after applying a negative Vg stress (-30 V) for 103 sec. On the contrary, in the “good-type” MOSFETs, the negative Vth shift is drastically reduced even against a much longer stress time (104 sec). Curiously, the same epi-wafer or the same oxidation process caused both the types of C-face MOSFETs . Therefore, from a view point of fabrication processes, it was difficult to understand the cause of the Vth instability. To clarify a microscopic mechanism of the Vth instability, we performed an electrically-detected-magnetic-resonance (EDMR) study on interface defects related to the Vthinstability of C-face MOSFETs. EDMR enables us to detect electron-spin-resonance (ESR) centers in small-sized electronic devices .
We prepared lateral n-channel C-face 4H-SiC MOSFETs on 4º-off 4H-SiC(000-1) epi-wafers. A 50-nm-thick gate oxide was grown by wet oxidation at 1000ºC and was subjected to H2 POA at 1100ºC for 30 min. This process ensured a high μ over 60 cm2/V·s. Some of the MOSFETs were subjected to gamma-ray irradiation in order to de-passivate hydrogen-terminated interface states. After the irradiation, we observed an increase in the Vthshift . The dose was set to 0.5 to 40 Mrad. EDMR measurements were carried out at room temperature with a 1.5-kHz magnetic-field modulation.
EDMR spectra of both the “bad-type” and “good-type” MOSFETs were dominated by the same defect, that we named “C-face defects” [1,2]. A primary difference among the two types was found in their signal intensities; i.e., the “bad-type” samples revealed much larger EDMR signal intensities than the “good-type” ones. The C-face defects were only detectable under a negative Vg, indicating that they have doubly-occupied levels (ESR-inactive states) in Vg ≥ 0V. Furthermore, we assigned these levels to be neutral donor levels, because they should be electrically-inactive in Vg ≥ 0V.
EDMR signal intensities increased with increasing a negative Vg, due to a conversion from doubly-occupied states (ESR-inactive, charge = 0) to singly-occupied states (ESR-active, charge = +1). Further increasing a negative Vg, the signal intensity reached a peak at a certain Vg (we define it as Vpeak) and turned into a decrease. This behavior indicates that the formation of empty states (ESR-inactive, charge = +2) has started. From the Vg dependence, we can estimate the density of the C-face defects (Nlevels), because Vpeak should be dependent on Nlevels. We performed device simulations on our C-face MOSFETs to estimate a relationship between Vpeak and Nlevels. Finally, Nlevels of various C-face MOSFETs were estimated over a wide range from 4×1012 cm-2 to 13×1012 cm-2.
We also found that Nlevels strongly correlated with the negative Vth shifts in the C-face MOSFETs, meaning that the C-face defects are related to the negative Vth shifts or positive fixed charges in the oxide layer. However, EDMR did not focus on the oxide layer. After removing a negative Vg, the EDMR signals disappeared immediately, clearly indicating that EDMR observed hole traps at the interface. The strong correlation between interfacial hole traps (C-face defects) and the positive fixed charges (hole traps in the oxide layer) suggests that the C-face defects are also formed in the oxide layer. They may be partly incorporated into the oxide layer during the oxidation. By reducing the C-face defects as small as possible, we can obtain high-performance SiC-MOSFETs with both high channel mobility and high reliability in Vth.
 T. Umeda et al., ECS Transactions vol. 58, 7 (2013).  G. W. Kim et al., Mater. Sci. Forum vol. 858, 591 (2016).