The reduction of the leakage current density and development of a high dielectric constant (k) greater than 60 as insulator have emerged as the main challenge in dynamic random access memory (DRAM) fabrication. RuO2 is a promising material for the electrodes because of its higher work function (5.4eV) compared as currently used TiN (4.7 eV) [1, 2]. Ru or RuO2 formation strongly depends on fabrication condition. The incubation time and surface roughness of RuO2 film, deposited by atomic layer deposition (ALD) process, were also related to the substrate material.
On the other hand, ZrO2/Al2O3/ZrO2 structure was currently employed as insulator because an amorphous Al2O3 layer can suppress to a leakage current path along the crystal grain boundaries of ZrO2 layer. Rutile TiO2 has been studied most intensively because of its remarkably high k of ~80. Furthermore, the crystal structure of RuO2 resembles that of rutile TiO2 [3]. However, TiO2 has a disadvantage of low band gap compared to ZrO2. To overcome this issue, we pay attention to Metal-insulator-metal (MIM) capacitor with RuO2 electrode and TiO2/Al2O3/TiO2 (TAT) insulator. The difference (1.53 eV) between conduction band offset of TiO2 and work function of RuO2 is about two times as large as that (0.83 eV) of TiO2 and TiN.
In this paper, we investigated surface roughness of RuO2 film on several buffer layers, such as covalent SiO2, ionic Al2O3 and TiO2, by plasma-enhanced ALD (PE-ALD). We also examine the PE-ALD RuO2 film as a bottom electrode for MIM capacitors with TAT insulator.
Experimental
MIM capacitors with TAT insulator consisted of a PE-ALD-RuO2 bottom electrode (BE-RuO2), a first TiO2 layer, an Al2O3 layer, a second TiO2 layer, and Sp-RuO2 top electrodes (TE-RuO2), in that order. Si substrates with thermal SiO2, ALD-Al2O3, and ALD-TiO2 buffer layers were first prepared, and then BE-RuO2 deposited on the buffer layers by PE-ALD at 300°C using Ru(C2H5C5H4)2 as a precursor and plasma oxygen gas. A first TiO2 layer (10 nm) was deposited on BE-RuO2 by ALD and the first post-deposition anneal (PDA) was carried out at 600°C. Next, Al2O3 (0.5 ~ 5 nm) layer was deposited by ALD, and the second TiO2 (10 nm) layer was then deposited under the same ALD condition as the first TiO2 layer. The second PDA was performed at 600°C. Finally, the Top-RuO2 was deposited by reactive sputtering.
Results and Discussion
Figure 1 shows k value of TAT as a function of Al2O3 thickness of TAT for RuO2/TAT/RuO2 capacitors. The C-V characteristics of the capacitors were measured by sweeping the voltage from -1 V to 1 V at 100 kHz. The k value of TAT was estimated from the C-V data at 0V. The k value shows a reasonable degradation behavior as Al2O3 thickness increases from 1 to 5 nm in all capacitors. No significant difference appears among SiO2, Al2O3, and TiO2 buffer layers. Furthermore, the k values exhibited 41 ~ 47 for TAT with 1-nm-thick Al2O3.
Next, we examine influence of surface roughness of a bottom electrode on leakage current property. TiN/TAT/TiN capacitors was prepared as a reference. The TiN electrode was deposited by sputtering (Sp-TiN). Figure 2 shows comparison of conductive-AFM data for PE-ALD-RuO2/TAT and Sp-TiN/TAT on Al2O3 buffer layer. The measured root mean square (RMS) roughness values for PE-ALD-RuO2 and RuO2/TAT were 0.9 and 1.1 nm, respectively. On the other hand, Sp-TiN and TiN/TAT both had a large surface roughness, with RMS values of 2.0 and 2.6 nm, respectively. Two leak spots were clearly observed on the TiN/TAT, while no spot on the RuO2/TAT under applied voltage of 8 V. This must be related to the difference of surface roughness between the RuO2 and TiN bottom electrodes.
Conclusions
The smooth surface roughness of PE-ALD-RuO2 film was obtained on ionic Al2O3 buffer layer. The RuO2/TAT/RuO2 capacitors exhibited relatively high k values of over 40. The leakage current property of capacitor is related to the surface roughness of a bottom electrode. Thus, the RuO2 bottom electrode deposited on the ionic Al2O3 buffer layer has the significant advantage for future DRAM
Acknowledgements
A part of this work was performed under the Cooperative Research Program of Institute for Joining and Welding Research Institute, Osaka University. Part of this research is supported by CREST, JST. The authors thank all staff members of the Nanofabrication Group in NIMS, for their support.
References
[1] J.-Y. Park et al., J. Alloys Compd. 610 (2014) 529.
[2] T. Nabatame et al., Mater. Sci. Semicond. Process. 9 (2006) 380.
[3] M. Kassml et al., J. Appl. Phys. 119 (2016) 244101.
