(Invited) Empirical Modeling of Broadband Insertion Losses in TSV-Interconnects

Wednesday, 12 October 2022: 14:15
Room 309 (The Hilton Atlanta)
K. J. Coakley, P. Kabos (NIST), S. Moreau (Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France.), and Y. Obeng (National Institute of Standards and Technology)
The reliability of through silicon via (TSV)-interconnects depends

on various factors including construction materials, fabrication

location on wafers, thermal history, operating conditions and

integration schemes. The magnitude of the frequency-dependent

$S_{21}$ microwave scattering parameter quantifies insertion losses

in TSV-interconnects. We attribute these losses (which affect device

reliability) to reorientation of electrically active defects, cracks,

voids, dielectric constant variation, and water molecules affected

by heat. We model these insertion losses with an equivalent circuit

model. We estimate model parameters with a stochastic optimization

implementation of the Levenberg-Marquadt method. For TSV-interconnects

from two different providers, we quantify how estimated model

parameters vary spatially (on a wafer), and how estimated parameters

vary with thermal cycles for TSV-interconnects fabricated at particular wafer

locations.