Sequential integration of thermoelectric generators (TEGs) on a silicon wafer is essential for next-generation electronics such as internet-of-things sensing network as an energy-harvesting device. A guideline of thermoelectric performance is defined as dimensionless figure of merit, zT=S²σT/κ, which is calculated from Seebeck coefficient (S), electrical conductivity (σ), thermal conductivity (κ), and absolute temperature (T). Germanium tin (Ge_1−xSn_x) binary alloys theoretically possess a low κ [1] and a high σ [2], implying that Ge_1−xSn_x enables high-performance TEGs. In our previous study on the thermal conductivity of Ge_1−xSn_x epitaxial layer grown on (001)-oriented Ge [3], it was revealed that a very low κ of 2.0 W/mK was obtained for a Ga-doped Ge_0.929Sn_0.071 epitaxial layer. The value is at least 77 and 30 times lower than that for bulk-Si (156 W/mK) and bulk-Ge (60 W/mK) [4], respectively, and same order with that for amorphous Si (1−2 W/mK) [5]. However, thermoelectric properties of the epitaxial layers could not be clarified because the underlying substrates were not electrical insulators.

It is therefore, in this study, we aim to reveal thermoelectric properties of Ge_1−xSn_x epitaxial layers with a wide range of Sn contents grown by low-temperature molecular beam epitaxy. Here, semi-insulating wafers of Si, GaAs, and InP were used as a substrate in order to isolate electrically from the substrates. Combined with the results for the polycrystalline films, we will establish a guideline for enhancing the zT value in narrow band-gap group-IV materials.

Acknowledgments: This work was partially supported by Grants-in-Aid for Scientific Research (S) (Grant No. 26220605) and Young Scientists (A) (Grant No. 17H04919) from JSPS in Japan and PRESTO (Grant No. JPMJPR15R2) from JST in Japan.

References: [1] S. N. Khatami and Z. Aksamiji, Phys. Rev. Appl. 6, 014015 (2016). [2] K. L. Low et al., J. Appl. Phys. 112, 103715 (2012). [3] M. Kurosawa et al., “Thermophysical characterizations of Ge_1−xSn_x epitaxial layers aiming for thermoelectric device,” 9th International Conference on Silicon Epitaxy and Hetero-structures (ICSI-9), Montreal, Canada, 4.4.1, May 21, (2015). [4] C. J. Glassbrenner and G. A. Slack, Phys. Rev. 134, A1058 (1964). [5] D. G. Cahill et al., J. Vac. Sci. Technol. A 7, 1259 (1989).