In today’s highly information-oriented society, more and more electronic devices are needed for high-end servers in cloud and sensor node devices in edge. Because of the power constraint, highly energy-efficient computing is required, which new transistor and memory technologies enable [1]. As a general guideline for energy-efficient computing, higher I_on/I_off at lower supply voltage is obtained by using steep subthreshold slope (SS) transistor, and normally-off operation is performed without much overhead by using non-volatile memory. Those logic and memory technologies must be developed at low cost. Recent discovery of ferroelectric (FE) HfO₂ [2] will realize low-cost and energy-efficient logic and memory devices. In this paper, the recent status of negative capacitance FET (NCFET), non-volatile SRAM (NV-SRAM), and FE tunnel junction memory (FTJ), all of which are based on FE-HfO₂, will be overviewed.

NCFET is the transistor which has ferroelectric gate insulator and uses negative capacitance to amplify surface potential. It has been regarded as one of the most promising steep SS transistors because of (1) high I_on/I_off ratio with high I_on, (2) CMOS process compatibility, and (3) minimum circuit modification, with the use of FE-HfO₂ at low cost. Device design guideline revealed that NCFET can operate at as low as 0.2V supply voltage [3]. Moreover, NCFET gate stack material can fit to advanced CMOS process with replacement gate FinFET [4] and Nanowire [5]. In recent years, there were encouraging experimental demonstrations of steep SS in long and short channel devices. Operation speed of NCFET may be limited by the dynamics of atomic displacement and domain dynamics [3,6], which is one of the central topics. NC effect is regarded as an additive performance booster and expected to synthesize with novel channel material and other steep SS transistors such as TFET [7].

IoT sensor node devices are expected to operate in an intermittent mode. The active rate of a transistor is much lower than clock frequency in IoT device. In order to suppress standby leakage power, especially in SRAM, it is important to bring the transistors in sleep mode as much as possible [1]. Normally-off computing is the idea that stores the current state data in NV memory and restore the data after wake-up without much latency and power overhead. NV-SRAM has been revisited by using FE-HfO₂ which realizes good scalability as well as cost effective process [8]. NV-SRAM has been recently designed, fabricated by integrating FE-HfO₂ capacitor in back-end process, and characterized. Store, power-off, and recall operation are successfully demonstrated.

New AI algorithms such as deep learning have made big impacts in business, however, it requires enormous amount of computing power. In order to use such algorithm in edge devices, energy efficiency should be greatly improved and hardware implementation of such algorithm will be highly required. Recently, artificial neural network (ANN) has been realized by using synaptic device such as resistive change RAM (ReRAM) as nonvolatile analog memory. FE memory is also the alternative for synaptic device. FTJ is an emerging memory cell which utilizes polarization switching to change on-sate and off-state tunneling electroresistance (TER) . FTJ has been recently demonstrated by using FE-HfO₂ with as high TER as >30 and multi-level cell operation [9]. Linearity and reliability should be further examined for ANN applications.

References

[1] T. Hiramoto, et al., SNW2016, p. 146, [2] J. Muller, et al., Nano Lett., 12, 4318 (2012), [3] M. Kobayashi, et al., AIP Advances, 6, 025113 (2016), [4] K. Jang, et al., Jpn. J. Appl. Phys., 57, 024201 (2018), [5] K. Jang, et al., Solid State Electron, 136, 60 (2017), [6] M. Kobayashi, et al., IEDM 2016, p. 314, [7] M. Kobayashi, et al., IEEE Nanotech., 16 2 253 (2017), [8] M. Kobayashi, et al., JEDS 6 280 (2018), [9] M. Kobayashi, et al., to be published.