2064
Extreme Bottom-Up Filling of Through Silicon Vias

Tuesday, October 29, 2013: 08:20
Union Square 21, Tower 3, 4th Floor (Hilton San Francisco Union Square)
Daniel Josell , NIST, Gaithersburg, MD
Thomas P. Moffat , NIST, Gaithersburg, MD

Abstract:

  • E7-2064 (163.7KB) - Abstract Text
See more of: Three Dimensional Interconnections 2
See more of: E7: Processing, Materials, and Integration of Damascene and 3D Interconnects 5
See more of: Dielectric and Semiconductor Materials, Devices, and Processing
<< Previous Abstract | Next Abstract >>