Back-end Processing 1

Monday, October 28, 2013: 10:30-12:00
Continental 7, Tower 3, Ballroom Level (Hilton San Francisco Union Square)
Chairs:
Eric Eisenbraun and Hiromu Ishii, D. Sc.
10:30
2215
(Invited) Low Temperature Direct Bonding 3D Stacking Technologies for High Density Device Integration
Lea Di Cioccio, MINATEC; Ionut Radu, Soitec; Gweltaz Gaudin, Soitec; Thomas Lacave, MINATEC; Floriane Baudin, MINATEC; Mariam Sadaka, Soitec; Thomas Signamarcheix, MINATEC
11:00
2216
(Invited) Mn5Ge3C0.8 Contacts for Spin Injection Into Ge
Inga Anita Fischer, University of Stuttgart; Christoph Sürgers, Karlsruhe Institute of Technology; Matthieu Petit, Aix-Marseille Université; Vinh Le Thanh, Aix-Marseille Université; Joerg Schulze, University of Stuttgart
11:30
2217
(Invited) Development of Multifunctional Liner/Barrier Systems for Sub-14nm Metallization
Eric Eisenbraun, The State University of New York
See more of: E12: ULSI Process Integration 8
See more of: Dielectric and Semiconductor Materials, Devices, and Processing
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