Processing Challenges of CMOS Integration of Finfets with All-Last Gate Stacks
C. Zhao, T. Ye (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China), H. Zhu (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences), H. Yin, J. Luo, H. Yang, C. Li, T. Yang, H. Cui, J. Gao (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China), G. Wang (Institute of Microelectronics of Chinese Academy of Sciences), Q. Xu, J. Xiang, Y. Zhang, Z. Zhao, J. Liu, P. Hong, L. Meng, T. Li, J. Li, X. He, W. Xiong (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China), D. Wang (Institute of Microelectronics of Chinese Academy of Sciences), Y. Lu (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China), J. Li (Institute of Microelectronics of Chinese Academy of Sciences), H. Zhong (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China), H. Yin, J. Yan (Institute of Microelectronics of Chinese Academy of Sciences), and W. Wang (Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China)
