(Invited) Mobility Enhancement of Uniaxially Strained Germanium Nanowire MOSFETs

Introduction

  High mobility channel materials are extensively explored to replace strained-Si in MOSFET devices to reduce power consumption by lowering supply voltages, V_dd, without degrading circuit performance. Among the various high mobility channel materials, compressively strained-Ge[1-4] is recognized as the most promising option for p-channel FETs due to its significantly high hole-mobility and compatibility with Si-CMOS process. In this paper, Ge nanowire MOSFETs with a uniaxial compressive strain as high as 3.9% were demonstrated by 2-step Ge-condensation technique. Record-high hole mobility (μ_eff = 1922 cm²/Vs) and record-low off-current (2.7x10^-9A/μm at V_d = -0.5V) were achieved among scaled (sub-100nm L_g) Ge MOSFET for the device with the L_gof 45nm.

Device fabrication

 Uniaxially strained-Ge nanowire channel was formed by the two-step Ge condensation technique, which induced uniaxial stress along the channel direction[3]. As a gate insulator, 5 nm thick Al₂O₃ was grown by using ALD. Partly, in order to improve the interface characteristics and hole mobility, MMT-plasma oxidized GeO_x / 3.2 nm-Al₂O₃ stacked gate insulator were adopted[4,5]. Ni(Si)Ge-metal S/D structures were formed by SALICIDE-like process. Detailed device fabrication process was shown in [4]. The Relationship between the wire width, W_wire and strain applied to the channel was measured by an immersion high-NA Raman spectroscopy[6] and a NBD measurement. The dependence of strain along the channel direction, ε_xx on wire width is shown in Fig.1. Extremely high (-3.8%) strain was evaluated for W_wire= 20 nm device, which was almost identical with the value obtained from the NBD measurement. Moreover, extremely high (over -3.9%) strain, which is almost identical with the misfit strain between Ge and Si, was evaluated by strained-Ge nanowire channel formed by improved two-step Ge condensation technique[4].

Mobility enhancement by uniaxial compressive strain

 In order to estimate the mobility enhancement factors in uniaxially strained-Ge and Si_1-xGe_x inversion channels, Poisson-Schrodinger self-consistent solver[7] was used to calculate the effective mass (m_eff) values. Here, 6x6 k*p method was used. Figure 2 shows the calculated Ge concentration dependence of inversion layer effective hole mass along [110] channel direction. For Ge (x=1), m_eff was calculated to be 0.055m₀ at fully strained condition, i.e., the lattice constant is identical with that of Si in [110] directions. Considering the ratio of m_eff, 12 times higher mobility that for unstrained Si can be expected on uniaxially strained-Ge. At these highly strained condition, orientation dependence among (001), (112) and (110) is diminished due to the band deformation.

Device characterization

 Hole mobility was extracted by a split CV method for long-channel and multi-wire devices. Figure 3(a) shows hole-mobility of the fabricated multi-wire MOSFETs. The W_wire = 40nm device, which has 95% Ge channel and GeO_x / Al₂O₃ stacked gate insulator, showed a peak hole mobility of 1922 cm²/Vs at N_s = 1.7x10¹²cm^-2, which exceeds that of -3.8% strained-Ge nanowire MOSFET with  Al₂O₃ gate stack. Moreover, the obtained mobility at N_s = 5x10¹²cm^-2 is corresponding to 5.8 times of the counterpart of a state-of-the-art strained-Si pMOSFETs[1]. Figure 3(b) shows that mobility values for fixed N_s increased with Ge concentration, x. The tendency is consistent with the m_eff calculation in Fig.2. Figure 4 shows I_d-V_g characteristics of fabricated strained-Ge nanowire pMOSFET with GeO_x / Al₂O₃ stacked gate insulator. I_on/I_off ~ 10⁵ has also been attained. And a minimum drain leakage current (I_d,off), as low as current 2.7x10^-9A/μm at V_d = -0.5V, were achieved with L_g = 45 nm. This I_d,off  value is the lowest minimum drain leakage among the previously reported sub-100nm L_g strained-Ge devices even though that has a shortest L_g.

Conclusions

 Ge nanowire MOSFETs with a uniaxial compressive strain as high as 3.9% were demonstrated by 2-step Ge-condensation technique. Record high hole mobility (μ_eff = 1922 cm²/Vs) and record-low off-current (2.7x10^-9A/μm at V_d = -0.5V) were achieved among scaled (sub-100nm L_g) Ge MOSFET for the device with the L_gof 45nm. These results indicate that strained-Ge channels have a potential to serve as pFET channel of scaled future CMOS.

References

[1] R. Pillarisetty et al., IEDM p.150 (2010). [2] W. Chern et al., IEDM p.387 (2012).  [3] K. Ikeda et al., VLSI Symp. p.165 (2012). [4] K. Ikeda et al., VLSI Symp. p.T31 (2013). [5] Y. Kamimuta et al., ISTDM. p.34 (2012). [6] D. Kosemura et al., SSDM p.931(2011). [7] S. Birner et al., IEEE TED 54(2007)2137.

Acknowledgements

This work was granted by JSPS through FIRST Program initiated by the Council for Science and Technology Policy (CSTP).