(Invited) Mobility Enhancement of Uniaxially Strained Germanium Nanowire MOSFETs
High mobility channel materials are extensively explored to replace strained-Si in MOSFET devices to reduce power consumption by lowering supply voltages, Vdd, without degrading circuit performance. Among the various high mobility channel materials, compressively strained-Ge[1-4] is recognized as the most promising option for p-channel FETs due to its significantly high hole-mobility and compatibility with Si-CMOS process. In this paper, Ge nanowire MOSFETs with a uniaxial compressive strain as high as 3.9% were demonstrated by 2-step Ge-condensation technique. Record-high hole mobility (μeff = 1922 cm2/Vs) and record-low off-current (2.7x10-9A/μm at Vd = -0.5V) were achieved among scaled (sub-100nm Lg) Ge MOSFET for the device with the Lgof 45nm.
Uniaxially strained-Ge nanowire channel was formed by the two-step Ge condensation technique, which induced uniaxial stress along the channel direction. As a gate insulator, 5 nm thick Al2O3 was grown by using ALD. Partly, in order to improve the interface characteristics and hole mobility, MMT-plasma oxidized GeOx / 3.2 nm-Al2O3 stacked gate insulator were adopted[4,5]. Ni(Si)Ge-metal S/D structures were formed by SALICIDE-like process. Detailed device fabrication process was shown in . The Relationship between the wire width, Wwire and strain applied to the channel was measured by an immersion high-NA Raman spectroscopy and a NBD measurement. The dependence of strain along the channel direction, εxx on wire width is shown in Fig.1. Extremely high (-3.8%) strain was evaluated for Wwire= 20 nm device, which was almost identical with the value obtained from the NBD measurement. Moreover, extremely high (over -3.9%) strain, which is almost identical with the misfit strain between Ge and Si, was evaluated by strained-Ge nanowire channel formed by improved two-step Ge condensation technique.
Mobility enhancement by uniaxial compressive strain
In order to estimate the mobility enhancement factors in uniaxially strained-Ge and Si1-xGex inversion channels, Poisson-Schrodinger self-consistent solver was used to calculate the effective mass (meff) values. Here, 6x6 k*p method was used. Figure 2 shows the calculated Ge concentration dependence of inversion layer effective hole mass along  channel direction. For Ge (x=1), meff was calculated to be 0.055m0 at fully strained condition, i.e., the lattice constant is identical with that of Si in  directions. Considering the ratio of meff, 12 times higher mobility that for unstrained Si can be expected on uniaxially strained-Ge. At these highly strained condition, orientation dependence among (001), (112) and (110) is diminished due to the band deformation.
Hole mobility was extracted by a split CV method for long-channel and multi-wire devices. Figure 3(a) shows hole-mobility of the fabricated multi-wire MOSFETs. The Wwire = 40nm device, which has 95% Ge channel and GeOx / Al2O3 stacked gate insulator, showed a peak hole mobility of 1922 cm2/Vs at Ns = 1.7x1012cm-2, which exceeds that of -3.8% strained-Ge nanowire MOSFET with Al2O3 gate stack. Moreover, the obtained mobility at Ns = 5x1012cm-2 is corresponding to 5.8 times of the counterpart of a state-of-the-art strained-Si pMOSFETs. Figure 3(b) shows that mobility values for fixed Ns increased with Ge concentration, x. The tendency is consistent with the meff calculation in Fig.2. Figure 4 shows Id-Vg characteristics of fabricated strained-Ge nanowire pMOSFET with GeOx / Al2O3 stacked gate insulator. Ion/Ioff ~ 105 has also been attained. And a minimum drain leakage current (Id,off), as low as current 2.7x10-9A/μm at Vd = -0.5V, were achieved with Lg = 45 nm. This Id,off value is the lowest minimum drain leakage among the previously reported sub-100nm Lg strained-Ge devices even though that has a shortest Lg.
Ge nanowire MOSFETs with a uniaxial compressive strain as high as 3.9% were demonstrated by 2-step Ge-condensation technique. Record high hole mobility (μeff = 1922 cm2/Vs) and record-low off-current (2.7x10-9A/μm at Vd = -0.5V) were achieved among scaled (sub-100nm Lg) Ge MOSFET for the device with the Lgof 45nm. These results indicate that strained-Ge channels have a potential to serve as pFET channel of scaled future CMOS.
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This work was granted by JSPS through FIRST Program initiated by the Council for Science and Technology Policy (CSTP).