1678
R&D Overview of 3D Integration Technology Using TSV in Japan

Monday, 6 October 2014: 13:00
Expo Center, 1st Floor, Universal 13 (Moon Palace Resort)
M. Kada (Osaka Prefecture University)
The electronic industry which towed Japanese industry is making a desperate effort for the second prosperity. The past several years a decline of Japanese electronic industry, especially semiconductor industry is severe and must come back again.

3D Integration Technology using Thorough Si Via (TSV) is expected as the engine for strengthening of global competitiveness. This technology, as a core technology of More than Moore, that importance has been recognized and development has been performed all over the world. However, full-scale volume production is not started yet, since killer applications which can accept the higher cost are not found. But the adoption to High band memory such as HMC, HBM, Wide/IO SDR, NAND memory, FPGA products, Logic+ Memory, CIS and so on including 3D and 2.5D will be expected in the near future.

In this presentation, the history of R&D of 3D Integration Technology using TSV in the world and the latest R&D are overviewed. Then, R&D results of Japanese national R&D project "Development on Functionally Innovative 3D-Integrated Circuit (Dream Chip)” which had been conducted through FY2008 to FY2012 is introduced. These consisted of six following subjects which lead to volume production were developed.

-Thermal Management & Chip Stacking Technology

-Thin Wafer Technology

-Ultra-wide Bus SiP 3D Integration Technology

-Digital-Analog 3D Integration Technology Heterogeneous 3D Integration Technology

-3D-Integration Basic Technology

Moreover, is explained the outline of "Next Generation Smart Device Project" newly started by the schedule of from FY2013 to FY2017. These are development of the key device of the system for grasping the circumference information on a car and realizing safe driving support.

-In-vehicle obstacle sensing device

-Obstacle detection and a risk cognition application-processor