Plasma Etch in the Era of Atomic Scale Fidelity

Tuesday, 7 October 2014: 14:00
Expo Center, 1st Floor, Universal 5 (Moon Palace Resort)
T. Lill, H. Singh, G. Kamarthy, K. J. Kanarik, A. Cohen, A. Eppler, J. Holland, A. Fischer, M. Shen, J. Marks, R. A. Gottscho, and V. Vahedi (Lam Research)
In IC manufacturing, the ultimate goal is to produce the structures that are conceived and modeled by design engineers in the real world with high fidelity. The term “fidelity”is chosen deliberately to express that what is needed in the end is the highest possible degree to which a material structure matches the design intent. It includes but is not limited to statistical criteria such as accuracy and precision. 

Plasma etch plays a key role in obtaining structural fidelityin all three dimensions. Accuracy is obtained by control of proximity and 3D effects such as critical dimension (CD) loading, profile loading, aspect ratio dependent etching (ARDE), and selectivity. Precision, on the other hand, is obtained by means of wafer-to-wafer, chamber-to-chamber, and tool-to-tool matching.

Atomic scale fidelity is required as we approach devices with a half pitch of 10 nm and below because the device dimensions and their allowed tolerances are of the same order of magnitude as the inter-atomic distances in the crystal lattice. This type of performance can be obtained when the material is removed layer by layer. Each step in the etch process uses the simplest possible chemistry to surgically target specific reactions at the wafer surface such as activation, removal, and passivation. We call this layer-by-layer etch with atomic fidelity atomic layer etch /1/.

We will introduce the framework of high productivity, production-worthy atomic layer etch and discuss the implications for hardware and process development.


Kanarik, et al., Solid State Technology, 56 (2013) 14-17.