Silicon-based TFTs I

Monday, 6 October 2014: 10:00-12:00
Expo Center, 1st Floor, Universal 4 (Moon Palace Resort)
Chairs:
Yue Kuo and Olivier Bonnaud
10:00
Introductory Remarks
10:10
1902
Unipolar CMOS Logic for Thin-Film Transistor Technology
T. P. Ma (Yale University)
10:40
1903
(Invited) A Bottom-up SiNW AMOSFET Fabrication Approach Giving SOI Level Performance
W. J. Nam, S. Pan, P. Garg, and S. J. Fonash (The Pennsylvania State University)
11:10
1904
Thinning the Active Layer of TFTs
M. L. Samb, H. Dong, E. Jacques (University Rennes 1), G. Sissoko (University Cheikh Anta Diop Dakar), A. Seidou Maiga Sr. (University Gaston Berger), and T. Mohammed-Brahim (University Rennes 1)
11:30
1905
(Invited) Extraction of Trap Densities in TFTs using C-V Characteristics
M. Kimura and T. Matsuda (Ryukoku University)
See more of: Q10: Thin Film Transistors 12 (TFT 12)
See more of: Electronic and Photonic Devices and Systems
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