1013
Oxygen Control Challenge for Advanced Wet Processing
Novel approaches including integration schemes (e.g. FinFET RMG) and new materials (e.g. Ge and III-V) for production are being studied. The introduction of Ge for CMOS device has shown interest in terms of advantage in the electron and hole mobility. However the use of Ge in CMOS integration is a new challenge in wet processing due to the significant Ge loss caused by oxidizers in liquid.
Previous studies had focused on how to improve the process hardware with respect to Dissolved Oxygen (DO) concentration in liquid and oxygen concentration in ambient in wet processing. [1] This study focuses on the effect of Low DO condition for integration schemes, particularly two types of defect formation are used as representative metrics for the performance: the voids on Ge and the trench-formation in RMG on doped Si. [2]
Experimental procedures
(1) DO concentration measurement: The DO concentration in room temperature UPW and HF (0.5%) flowing though perfluoroalkoxy (PFA) tubing was measured using a DO concentration cell (HACH LANGE, 31120E.04). HF (0.5%)was prepared by co-mixing HF (49%) and UPW in line. Oxygen sensor (TORAY, LC-850KS) was used to measure oxygen concentration in ambient.
(2) Selective Ni removal deposited on Ge: The sample shown as Fig. 1(a) was used to examine the generation of Ge voiding caused by galvanic corrosion in processing by various conditions of DO concentration in HCl (0.37%) and oxygen concentration in ambient. The generation of voiding was determined by SEM (AMAT, SEMVision G3) after wet processing.
(3) Dummy oxide removal in high-k last process integration: The sample shown as Fig. 1(b) was used to examine the generation of Si channel trenching in processing by various conditions of DO concentration in HF (1.5%) and oxygen concentration in ambient. The generation of Si channel trenching was determined by TEM (FEI, Tecnai F30).
Wet processing and DO concentration measurement were performed on a SCREEN Semiconductor Solutions single wafer cleaning tool (SU-3100).
Results and Discussion
Equipment improvements: Two points are key to reduce DO concentration in chemicals. The first key point is DO control in liquid. Table 1 shows the DO concentration in chemical at Point of Use (POU) with / without N2 purge to chemical tank or degassing module in line. This result shows that N2 purge and degassing module were effective to reduce the DO concentration in chemical. The second point is oxygen control in the wafer ambient environment during wet processing. Fig. 2 shows the oxygen concentration in ambient by using a shield-plate close to the wafer to block the atmosphere locally in combination with a N2 supply. By using the shield-plate, the oxygen concentration was controlled with less than 10 ppm, which resulted in only 0.44 ppb of dissolved oxygen based on Henry’s law. This concentration does not impact the DO concentration in chemical.
By combining these two elements, the DO concentration in processing chemical can be reduced to 25ppb (HF 0.5%).
Process results: Fig. 3 shows the NiGe loss on blanket wafer after processing in dHCl. A significant reduction of NiGe loss is obtained with Low DO process (25ppb). The prevention of void occurrence on Ge bulk FinFET device wafers is reported for the selective etch with the hot HCl process with low DO condition.
Fig. 4 shows that the reduction of DO concentration in dHF can suppress Si channel trenching occurrence in condition of over etching and expand the process window.
Conclusions
It has been shown that the prevention of voiding occurrence on Ge and Si channel trenching occurrence was demonstrated by processing device samples with normal chemical with consideration to reduce the level of DO. The following two elements, “DO concentration in liquid” and “oxygen concentration in ambient in processing” are the key factors to achieve the low DO concentration processing.
References
[1] Y. Yoshida et al, Solid State Phenomena, 219, 85-88 (2015).
[2] F. Sebaai et al, Solid State Phenomena, 194, 13-16 (2013).