CMOS and NEMS Hybrid Architectures

This paper reviews some major realizations in the field of monolithic integration of Nano-Electro-Mechanical-Systems (NEMS) with CMOS. Such integration strategy drastically improves the efficiency of the electrical detection of the NEMS motion. It also represents a compulsory milestone to practically implement breakthrough applications of NEMS, such as mass spectrometry, that require a very high density of ultra-sensitive devices. NEMS stands usually for beam-shaped mechanical resonators with two out of their three main dimensions below 1µm.   Such devices enable novel breakthrough applications, mainly in the field of chemical analysis [1], life science [2] and computing [3]. In the first two fields, they appear as excellent candidates since they exhibit unprecedented mass resolution, thanks to their inherent low mass, high resonance frequency, and good frequency stability [4]. Recent works have not only confirmed their intrinsic exceptional sensing potential, but also illustrated their increasing maturity as they were successfully integrated into complex systems. Nevertheless, these new applications tend to involve high-density NEMS arrays with a large number of electrical contacts per device, making their individual addressing complex. Moreover, the electromechanical transduction scheme of devices with such ultimate size and frequency range (10-100MHz) is critical. In this context, monolithic NEMS-CMOS integration seems the most adequate way to overcome those challenges. Tracking in real time the resonance frequency of thousands of NEMS deployed in arrays will require an individual addressing only enabled by monolithic integration. In practice, such arrays will probably consist of thousands of pixels containing a NEMS-CMOS close-loop oscillator, under the form of a PLL or a self-oscillator including the NEMS and its amplifier.

Monolithic integration of NEMS resonators with a standard CMOS technology has been demonstrated in the last decade, mainly through three approaches using: (i) the last metal layer of back-end levels as NEMS structural layer [5,6]. (ii) the middle-end polySi layers [7,8], standardly used as capacitors, (iii) NEMS at the front-end, using the top single-crystal Si layer of SOI wafers [9,10], or the whole MOS stack. The trend is on continuously miniaturizing the NEMS , and unlike MEMS-CMOS devices, the novelty is that NEMS are converging towards advanced CMOS in terms of processes and dimensions: for instance, we achieved the smallest monolithic NEMS (to our knowledge) [10,11] integrated at the front-end in the same 20nm thick layer as transistors channels of an FDSOI technology.

Another promising approach for the future is to target no modification of the CMOS layer by introducing a fully above IC approach. One potential way to achieve this is the so-called 3D sequential integration [11] after the standard CMOS back-end. Two solutions could be envisaged. The first one could use crystalline silicon coupled with wafer bonding approach. Another lower cost solution would use poly-silicon as the active layer [12], possibly achieved with laser annealing on amorphous silicon. Our recent results on poly-silicon NEMS with sub 100nm critical dimensions demonstrate this approach as very competitive for low cost applications with excellent performance when compared to crystalline silicon. In particular, comparable quality factors (130 in the air, 3900 in vacuum) and frequency stabilities were demonstrated on poly-silicon.

Regarding NEMS-CMOS applications, gas and bio-sensing may be two future drivers. In the latter case, the practical implementation of NEMS-based mass spectroscopy and sensors for genomics [13] will probably require high-density NEMS-CMOS arrays for increased capture area and real-time monitoring.

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[12] I Ouerghi et al., in Proc. IEEE IEDM (2014)

[13] A. Bietsch et al., Nature Nanotech. (2006)