Evaluation of InGaAs and InP Compatibility with Alkaline Photoresist Stripping Formulations

III-V semiconductors, such as InGaAs, are leading contenders to replace Si as high-mobility channel materials for sub-10 nm finFETs.(1,2) Implementation of these high-mobility materials into FEOL processes faces many challenges because of the chemical sensitivity and complex nature of these materials relative to the conventional Si channel.  In particular, damage from wet cleaning solutions is a major concern that needs to be understood and controlled when designing new cleaning formulations for use in the manufacture of III-V based devices.  Herein, we will describe our work at understanding InGaAs and InP compatibility with formulated alkaline photoresist strippers with a focus on the impact of solvent and alkaline component selection.

Initial studies focused on etch rates of InGaAs and InP in  a series of proprietary cleaning chemistries.  InGaAs films (500 Å) on InP – as well as bulk InP – wafers were used for this study.  Etch rates were determined by energy-dispersive X-ray spectroscopy (EDX) as well as by gallium and arsenic leaching via ICP-MS.  While acidic chemistries in general showed excellent compatibility,  alkaline- and amine-based chemistries displayed varying levels of compatibility with InGaAs.

Because of the range of compatibilities observed in alkaline chemistries, we explored the impact of solvent and alkali selection as well as water content on selectivity.  Specifically, we evaluated a series of non-proprietary solutions using a selection of solvent types, alkaline components, and water content (semi-aqueous vs. non-aqueous).   The impacts of these components will be discussed and compared to results previously presented for GaAs etched in these same chemistries.(3)

For the strippers that are reported to be highly compatible with InGaAs and InP, a more thorough analysis of surface changes will be reported including changes in roughness (AFM) and composition (XPS).  The results and key learnings from this study will be discussed in relation to how InGaAs and InP may be cleaned with limited surface damage.

1)       International Technology Roadmap for Semiconductors, see www.itrs.net

2)       J. A. del Alomo, Nature, 479, 317 (2011).

3)       G. Westwood, SEMATECH Surface Preparation and Cleaning Conference, Austin, TX, 2012.