Germanium devices are widely investigated due to their high hole and electron mobility compared to that of silicon. Mobility above 300 cm²V^-1s^-1 has been reported for Ge PMOS. On the other hand, Ge NMOS showed poor drive current and low mobility in previous studies. This poor performance is attributed to the inability to form a good Ge/high-k interface (1). They also exhibit hysteresis during the capacitance voltage (C-V) sweep because of the presence of slow trap states near the dielectric substrate interface (2). Recently, the use of a slot-plane-antenna (SPA) Ar plasma during the deposition of ALD Hf_1-xZr_xO₂ on Si substrate was reported to enhance the EOT (equivalent oxide thickness) downscaling potential with a suppressed trap formation in the bulk oxide under electrical stress (3).

In this work, we have investigated TiN/HfZrO/Al₂O₃/Ge gate stack using MOS capacitors with six different Zr/(Hf+Zr) content (0%, 25%, 33%, 50%, 75%, and 100%) in the dielectrics. The dielectrics were subjected to SPA plasma oxidation after the deposition process. Electrical characterization of these devices was studied in order to observe the impact of Zr addition in HfO₂. The equivalent oxide thickness (EOT), flat-band voltage (V_FB), interface state density (D_it), C-V hysteresis, and leakage current (I-V) behavior were analyzed. Figure 1 shows the comparison of EOT and V_FB as a function of Zr content in the dielectrics. Figure 2 presents the C-V hysteresis data (to the left axis) and mid gap D_it (to the right axis) for these devices. The addition of Zr in HfO₂ was found to enhance the EOT up to 75% Zr incorporation. These devices also showed lower hysteresis in the C-V characteristics. However, A reduction in EOT for these devices showed to increase the flat-band voltage shift (Fig. 1). While devices with 100% Zr showed the highest EOT value coupled with the lowest mid gap D_it, a reduction in EOT with Zr addition in HfO₂ moderately increases the D_it (Fig. 2 to the right scale).

Figure Captions:

Fig. 1: Equivalent oxide thickness (filled squares to the right scale) and flat-band voltage (open triangles to the left scale) comparison for the addition of Zr in HfO₂.

Fig. 2: Hysteresis behavior extracted from C-V sweep first from accumulation to inversion and then from inversion to accumulation (filled squares to the left scale) and interface state density by conductance method (open circles to the right scale) for ALD Hf_1-xZr_xO₂/Al₂O₃ gate stacks on Ge substrate.

References:

1. Y. Ding, D. Misra, M. N. Bhuyian, ECS Trans., 69 (5) 313-322 (2015).

2. J. Lin, Y. Y. Gomeniuk, S. Monaghan et al., J. Appl. Phys., 114, 144105 (2013).

3. M. N. Bhuyian, D. Misra, K. Tapily et al., ECS. J. of Solid State Sci. Tech., 3(5) N83 (2014).