Study of SiGe Surface Cleaning

Tuesday, 3 October 2017: 09:20
Chesapeake I (Gaylord National Resort and Convention Center)
K. Komori (SCREEN Semiconductor Solutions Co., Ltd), K. Wostyn (imec), D. Rondas (Imec, Belgium), J. L. Prado (imec vzw), T. Conard, R. Loo, L. Å. Ragnarsson (Imec, Belgium), N. Horiguchi (imec, Belgium), and F. Holsteyns (imec)
Recently Si can be replaced with SiGe in FinFETs (field-effect transistors) and GAA (gate all around) structures in order to get the higher carrier mobility. However, Ge oxide concentration of SiGe oxide causes an increase in interface trap density (Dit) and becomes a defect of device. Although Si and Ge surface treatments have been studied so far, SiGe surface treatment is still not well understood. Recently cleaning of SiGe surface is required and began to be studied for Ge concentration of SiGe oxide by dry and wet cleaning has been reported [1-2].

For cleaning of SiGe surface, this study focused on wet process solutions of O3 water and acids (HF and HCl) with Si1-xGex (X=25-45%) wafer. The behavior of oxide is shown by using these chemical solutions individually or in combination. XPS measurement showed differences of Ge oxide concentration.

As first experiment, native oxide shows Ge concentration of oxide and substrate are same or slightly less than substrate. On the other hand, chemical oxide by using O3 water showed concentration of Ge oxide is 10% less than substrate on Si75Ge25 wafer.

This study shows the behavior of SiGe surface can be controlled by changing chemical concentration or chemical combination. Details of results will be reported in presentation.

[1]S.L.Heslop,et al.,in:ECS Transactions,69 (8) 287-293 (2015)

[2]Sang Wook Park,et al., in:J.Vac.Sci.Technol.A,Vol.33,No.4,Jul/Aug 2015