Copper electroplating has been widely used in the fabrication of electronic products. For semiconductor fabrication, damascene copper process needs copper electroplating;1
for IC chip packaging, 2.5D, 3D TSV and FOWLP need copper electroplating;2
for HDI PCB fabrication, microvias and through holes also need copper electroplating.3
Regarding the 3D IC chip packaging and FOWLP, copper pillars are necessary components, which are used as conducting pillars or heat conductors. Currently, copper pillars are made by electroplating, so that they are a polycrystalline structure. In other words, there are many grain boundaries in the copper pillars, which lead to a high electric resistance and, usually, need to be annealed at high temperature to obtain large grain sizes and reduce their electric resistance simultaneously. Moreover, if the copper pillar is polycrystalline, it is easily to form IMC with tin-containing solder and induce Kirkendall voids.4, 5
Many papers have demonstrated that the formation of Kirkendall void depends on the grain boundary of the electroplated copper. The more grain boundaries in the electroplated copper, the more Kirkendall voids will be observed.5
Impurities from plating additives, empty space between two grains and active copper atoms exist at the grain boundaries will lead to vacancies. Once these vacancies aggregate together, voids will be observed. Therefore, if there is no grain boundary instead of nano-twinned boundary or single crystal without boundary after copper electroplating, no void will be observed even after a long ageing time at a high temperature. Herein, a copper foil is obtained by electroplating and it has an ultra-large grain size (i.e., 10~20 μm) after electroplating. Hence, it needn’t annealing after electroplating. Of course, there is no Kirkendall void at the interface between copper/tin joint for a long ageing time at a high temperature.
1. P. C. Andricacos, C. Uzoh, J. O. Dukovic, J. Horkans and H. Deligianni, IBM Journal of Research and Development, 42, 567 (1998).
2. V.-H. Hoang and K. Kondo, J. Electrochem. Soc., 164, D795 (2017).
3. T.-C. Chen, Y.-L. Tsai, C.-F. Hsu, W.-P. Dow and Y. Hashimoto, Electrochimica Acta, 212, 572 (2016).
4. T. C. Liu, C. M. Liu, Y. S. Huang, C. Chen and K. N. Tu, Scripta Mater., 68, 241 (2013).
5. L. Yin and P. Borgesen, J. Mater. Res., 26, 455 (2011).