This paper addresses the opportunities and challenges of wet and dry etches in the integration of gate-all-around (GAA) device, which is emerging as a promising solution to replace FinFET [1-3]. For the GAA device fabrication, a quintessential challenge is an isotropic etching of dielectrics, semiconductors, and metals with high selectivity to the exposed materials. In this paper, we will demonstrate the significance of (1) Si/SiGe multi stacked fin reveal, (2) cavity etch and inner spacer formation, (3) nanowire and nanosheet release, and (4) replacement metal gate patterning.

[1] H. Mertens et al., VLSI Tech. Dig., 158 (2016).

[2] H. Mertens et al., IEDM Tech. Dig., 828 (2017).

[3] S. Kal et al., Proc. SPIE, 10963 (2019).