While direct wafer-bonding can be used for device fabrication, it can also be used as a pathway for characterizing and understanding the properties of interfaces across bonded materials. In this work, an ion-bombardment process with varying ion energies in an EVG^® ComBond^® high vacuum wafer-bonding system is used to remove the native oxides on (001) p-type silicon wafers [1]. The results of argon ions with ion energies varying over one order of magnitude (from a factor of 0.2 to 2 of a baseline energy E₀) are presented in this study. Removing oxide layers between two bonded materials can lead to electrically conductive interfaces of the bonded structure; however, the consequence of employing this ion-bombardment procedure is that it induces surface and sub-surface damage of the wafer. This resulting damage limits the bonded interface’s electrical conductivity by forming a barrier to electronic transport across the bonded interface.

The thicknesses and densities of the damaged surfaces were determined using x-ray reflectivity (XRR) and spectroscopic ellipsometry (SE). XRR and SE also both revealed a transition layer at the interface between the bulk (crystalline) silicon and the damaged silicon region. XRR results show that upon increasing the ion energy from 0.2·E₀ to 0.4·E₀, the damaged layer thickness remains constant or even decreases slightly (from 2.2 ± 0.3 nm to 1.8 ± 0.3 nm) while the transition layer thickness maintains ~1.0 nm in both samples. However, increasing the ion energy from 0.4·E₀ to 2·E₀ results in an increase in the damage layer thicknesses from 1.8 ± 0.3 nm to 3.5 ± 0.3 nm as well as a thickness increase of transition layers from ~1.0 ± 0.2 nm to 3.0 ± 0.2 nm. Interestingly, the damaged silicon layer density is approximately the same across all ion energies used. The resulting damaged silicon region has a density 20% less than that of crystalline Si and deposited amorphous silicon.

Cross-sectional transmission electron microscopy (X-TEM) images of 0.4·E₀ and 2·E₀ samples show that the damage region between the bonded wafers spans 3.7 nm and 7.5 nm, respectively, in agreement with the XRR and SE results for single wafer thicknesses. Bonded pairs with thicker damaged regions exhibit lower electrical conductivity across the interface. Current-voltage (I-V) measurements show that the 0.4·E₀ and 2·E₀ samples exhibited interfacial resistances of about 0.8 kΩ and 39 kΩ, respectively. X-TEM images show that annealing at 450 °C for 12 hours removes nearly all of the damage region. The removal of the damaged region after annealing is consistent with subsequent I-V measurements that show negligible interfacial resistance. In other words, the electrical conductivity across the bonded interface is comparable to the conductivity within the individual wafers, which suggests the energy barrier across the interface due to the damaged region is mitigated after annealing. A model of the energy barrier profile across the interface due to the damage region is presented.

Reference

[1] C. Flötgen,et al., ECS Transactions 64, 103-110 (2014).