In this talk, we will be presenting (1) a revolutionary and validated CMOS fab-friendly 8-inch diameter QST® (QROMIS Substrate Technology) substrates, which are scalable to 12-inch, for very high quality (bulk-like) and crack-free GaN epitaxial growth, including enablement of large diameter free-standing GaN substrates via growing very thick GaN epitaxy layers (>100 µm), and (2) QST®-based GaN device results enabling an unmatched cost, performance, and application scale. The QST® substrates, with a compliant Si <111> growth surface, have a thermal expansion coefficient matched to GaN epitaxial layers; and this unique feature alleviates the fundamental challenges in (a) economies of scale, (b) performance scale and (c) applications scale which are inherent to GaN-on-Si, GaN-on-SiC, GaN-on-GaN and other proposed solutions.
Various wafer bonding technologies play a key role in large diameter GaN device manufacturing on QST® substrates. Different types of commercial bonding techniques are used in QST® substrate manufacturing, device fabrication and backend processes. In this talk, we will zoom into key wafer bonding techniques and processes which are currently being used (or to be used) in high volume and advanced GaN device manufacturing, such as for LEDs, power and RF devices in lateral, vertical and wafer-level chip scale package forms and architectures.