2066
Kinetic Monte Carlo Simulation of Filling High-Aspect-Ratio Through Silicon Via - II

Tuesday, October 29, 2013: 09:00
Union Square 21, Tower 3, 4th Floor (Hilton San Francisco Union Square)
Yutaka Kaneko, Doctor of Engineering , Graduate School of Informatics, Kyoto University, Kyoto, Japan
Yuuki Fukiage , Graduate School of Informatics, Kyoto University
Taro Hayashi, M.S. , Osaka Prefecture University, Sakai, Osaka, Japan
Kazuo Kondo, Ph.D. , Osaka Prefecture University, Sakai, Japan
Katsuhiko Ohara , C. Uyemura & Co., Ltd.
Fujio Asa , C. Uyemura & Co., Ltd.

Abstract:

See more of: Three Dimensional Interconnections 2
See more of: E7: Processing, Materials, and Integration of Damascene and 3D Interconnects 5
See more of: Dielectric and Semiconductor Materials, Devices, and Processing
<< Previous Abstract | Next Abstract >>