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True Figure of Merit (FOM) of a Power Semiconductor Switch

Tuesday, October 29, 2013: 11:10
Continental 9, Tower 3, Ballroom Level (Hilton San Francisco Union Square)
Krishna Shenai , 9700 South Cass Avenue, Bldg. 362, Argonne National Laboratory

Abstract:

See more of: Power Device Reliability 1
See more of: E3: GaN and SiC Power Technologies 3
See more of: Dielectric and Semiconductor Materials, Devices, and Processing
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