Monday, October 28, 2013: 14:00-16:00
Continental 9, Tower 3, Ballroom Level (Hilton San Francisco Union Square)
Chairs:
N. Ohtani
and
Michael Dudley, B.Sc., Ph.D
14:00
Progress in the Resolution of Materials Challenges for High-Voltage SiC Power Devices
Kurt Gaskill, Naval Research Laboratory;
Rachael L. Myers-Ward, Naval Research Laboratory;
Z. R. Robinson, Naval Research Laboratory;
Virginia D. Wheeler, Naval Research Laboratory;
P. B. Klein, Naval Research Laboratory;
Nadeemullah A Mahadik, Ph. D., Naval Research Laboratory;
Robert E Stahlbush, Ph. D., Naval Research Laboratory;
Luke O. Nyakiti, Naval Research Laboratory;
Anindya Nath, George Mason University;
Charles R. Eddy Jr., Naval Research Laboratory
15:00
Reducing the Wafer Off Angle for 4H-SiC Homoepitaxy
Kazutoshi Kojima, Advanced Power Electronics Research Center;
K. Masumoto, Advanced Power Electronics Research Center;
S. Ito, Advanced Power Electronics Research Center;
A. Nagata, Advanced Power Electronics Research Center;
H. Okumura, R &D partnership for Future Power Electronics Technology
15:20
Nucleation of In-Grown Stacking Faults and Dislocation Half Loops in 4H-SiC Epilayers Deposited at High Growth Rate
M. Abadier, Carnegie Mellon Univ.;
Rachael L. Myers-Ward, Naval Research Laboratory;
Nadeemullah A Mahadik, Ph. D., Naval Research Laboratory;
Robert E Stahlbush, Ph. D., Naval Research Laboratory;
Virginia D. Wheeler, Naval Research Laboratory;
Luke O. Nyakiti, Naval Research Laboratory;
Charles R. Eddy Jr., Naval Research Laboratory;
Kurt Gaskill, Naval Research Laboratory;
Haizheng Song, University of South Carolina;
Tangali S. Sudarshan, University of South Carolina;
Yoosuf N. Picard, Carnegie Mellon Univ.;
Marek Skowronski, Carnegie Mellon Univ.