(Invited) MOCVD of III-V Compounds on Silicon Substrate-Status and Challenges

Tuesday, May 13, 2014: 17:00
Flagler, Ground Level (Hilton Orlando Bonnet Creek)
M. Heuken (AIXTRON SE)
Next generation high speed digital circuits utilizing III/V based transistors, Solid State Lighting applications of LED as well as power management electronic applications utilizing AlGaInN/GaN HEMT on Silicon substrate require advanced, high yield and high throughput MOCVD production technology.

The emerging III/V-on-Silicon technology for electronic and optoelectronic applications also has an impact on MOCVD reactor design. Besides the differences in lattice constants and thermal expansion coefficients between Silicon substrate and III-V epi layer stack additional issues such as particle formation, reproducible starting conditions, anti phase domains and substrate cleaning prior to growth need to be solved. In addition the deposition of high K material on top of the structures may be required. To address these challenges we developed the Planetary Reactor for 5x200 mm GaN-on-Si applications. The showerhead technology opens the path to grow compound semiconductor on 300/450 mm wafer.

To establish most appropriate process conditions for the growth of five times 200 mm wafers using the existing horizontal flow Planetary Reactor production tool, the existing MOVPE platform was further upgraded by some features. The probably most important one is the transition from a triple-inlet injector towards a penta injector. This injector features five injection levels instead of three so far. Taking this approach very good uniformities all over the 200 mm radius are achieved.

To assess the Planetary Reactor performance we grew on 200 mm Si wafer 5-fold InGaN LED structures with a total thickness of 5.9 µm using a sequence of strain relieving AlGaN layers with Al-concentrations of ~67%, ~57% and ~32% followed by an in-situ deposited SiN mask for ELOG. The GaN buffer had a total thickness of 5 µm with intermittent low temperature (LT) AlN strain management layers.

Photoluminescence (PL) mappings were performed on the wafers at room temperature. The average wavelength over all wafers was determined to be lmean = 451 nm. The maximal wavelength spread from wafer to wafer was Dlw2w= 2.6 nm. No edge exclusion was used when measuring these results.

Simulation results as well as evolutionary steps have led to the introduction of the Close Coupled Showerhead (CCS) reactors. The showerhead is designed to allow no mixing of incompatible sources upstream of the reactor chamber and minimises the possibility of pre-reaction before the precursors reach the diffusion/boundary layer. The showerhead reactor exhibit high wafer capacity configurations 75x2”, 19x4” and 3x8” for Crius II XL. The reactor is large enough for 200/300 mm single wafer processing. Details of the growth chamber will be discussed. The basic design rules and principles of MOCVD growth optimization and details of today’s high throughput MOCVD technology will be explained. After designing an even larger MOCVD reaction chamber based on simulation predictions first experiments on 450 mm silicon wafer were done. Elipsometry measurements of a 450 mm wafer show a layer thickness of 354 nm by taking 120 data points. The total deviation is measured to 3.16%, Standard deviation is 0.79%. Further implications for the move to 450 mm substrates will be discussed.

The Cost of Ownership (CoO) of MOCVD tools is mainly determined by the used wafer size and yield, In-Situ monitoring effort and by reduction of user interaction due to automation. This paper also discusses the different developments in the field of MOCVD to facilitate further reduction in production cost and simultaneously improving the device characteristics by using nanostructures. That includes selective growth on silicon to predefine mesa area for the transistors in a CMOS logic environment and the material selection from high mobility Sb based HEMT structures to more classic InGaAs based structures on GaAs or InP based buffer layer. Finally an outlook will be given for electronic applications such as graphene and new 2D nanomaterials. But also in the field of optoelectronics recent experimental progress on silicon substrate will be discussed.