Study of Mass Transport for Efficient Fluid Processing

Monday, 2 October 2017: 14:00
Chesapeake I (Gaylord National Resort and Convention Center)
P. W. Mertens, M. Haslinger, M. Soha, and J. John (imec)
Manufacturing of semiconductor integrated circuits has become a major industry producing a lot of key component for “commodity products”.

As such it obeys the trends of all economic activities. One of the key trend is increasing learning with increasing accumulated business volume. A trend that goes a long is reduction of manufacturing cost (per function or performance) and market value.

In the past this trend was accomplished by continuous scaling down the feature size of the transistor, the key component of a chip. This has led to a boost in productivity as the numbers of chips on a wafer increased, while manufacturing cost per wafer, barely went up.

At the same time the transistors and circuits gained in performance (such as speed, power consumption etc…). Several cycles of feature size reduction (“geometric scaling down”) followed at a high pace. In this technology race, the focus was on technology enablement, rather than on reducing the wafer manufacturing cost.

Currently the traditional approach of reduction of cost/function by geometric scaling seems to run out of steam and slow down significantly.

The goal of this work is to study a simple processing configuration to create a better understanding of wet processing in order to make it more cost effective.

The system of choice is a simple parallel flow of liquid along the wafer surface.

In order to have a good uniformity the transport of species should be relatively fast as to not be a limiting factor for the overall process.

The goal is to minimize equipment cost by the use of very simple hardware and rather short process times (order of 10 sec). Also the consumption of chemicals will be limited by using a narrow tank with minimal volume and by extended use and re-circulation of chemicals until they are “completely” exhausted.

Where appropriate (in view of the total process time, and contamination loading) a cascade sequence of reactors and “cross-flow” of chemicals would be applied.

In a first approximation the parallel-plate flow pattern is assumed to be laminar with a parabolic (Poiseuille) velocity profile. Near the wafer surface this velocity profile is approximately linear (eq. (1)).

The mass transport of chemicals is initially by convection flow parallel to the x direction and eventually to the wafer surface by diffusion along the y-direction.

The position along the x-axis where the diffusion transport can marginally keep up with the convection transport is L (eq. 2). Ideally, fast diffusion is obtained if this point is positioned beyond the edge of the wafer. (by using a high liquid flow rate, or allowing sufficient process time.) Equation (2) allows to determine an optimal flow rate for a desired total process time.

In order to evaluate the concept a simple narrow single wafer reactor was built.

The total width of the reactor can be modified to 2, 4, or 10 mm.

The reactor can be supplied with rinse water in a recirculation mode or in a flow direct to drain at a flow rate up to 30 lpm.

Dye-imaging tests were performed to analyse the flow behavior. Methylene Blue (Sigma Aldrich) was injected into the flow through a narrow injection needle. These tests confirmed the flow to be laminar for a flow rate of 10 lpm (Re= 560).

The experimental concept tank is connected to a (pump + canister) recirculation system to allow for a high flow without high consumption rate of chemicals. The tank can be filled with (MKS) ozonated UPW or with aqueous HF-mixtures. This allows for performing an “imec cleaning” sequence.

For cost reasons, this prototype reactor is made out of low basic transparent polymers for optimal viewing, but with sacrificing chemical compatibility.

The cleaning chemicals are recirculated at 10 l/min.

Good metal (Fe) removal efficiency is demonstrated with carrier lifetime (as high as 0.5 ms) measurements on n-type silicon.