GaN Technologies II

Tuesday, 3 October 2017: 15:30-17:20
Chesapeake B (Gaylord National Resort and Convention Center)
Chairs:
Jaime A. Freitas Jr. and Roberta Nipoti
15:30
(Invited) Achieving Vertical Trench-Gate GaN MOSFETs via Process Optimization
D. I. Shahin (University of Maryland), T. J. Anderson (U.S. Naval Research Laboratory), and A. Christou (University of Maryland)
16:00
(Invited) New Approaches for Shrinking the Performance Gap for GaN Power Devices
M. Shur (Rensselaer Polytechnic Institute) and G. Simin (University of South Carolina)
16:30
(Invited) ScAlN: A Novel Barrier Material for High Power GaN-Based RF Transistors
M. T. Hardy, B. P. Downey, N. Nepal, D. F. Storm, D. S. Katzer, and D. J. Meyer (U.S. Naval Research Laboratory)
17:00
GaN Lateral High Voltage Photoconductive Semiconductor Switches
A. D. Koehler (Naval Research Laboratory), A. Nath (George Mason University), A. Khachatrian (Sotera Defense Solutions), T. J. Anderson (Naval Research Laboratory), M. J. Tadjer, M. A. Mastro, J. K. Hite (U.S. Naval Research Laboratory), S. Buchner, K. D. Hobart, and F. J. Kub (Naval Research Laboratory)