FET 3

Tuesday, 2 October 2018: 08:30-10:10
Universal 13 (Expo Center)
Chair:
Aaron Thean
08:30
1042
(Invited) Ultrathin-Body Ge-on-Insulator MOSFET and TFET Technologies
S. Takagi, W. K. Kim, K. W. Jo, R. Matsumura, R. Takaguchi, T. Katoh, T. E. Bae, K. Kato, and M. Takenaka (The University of Tokyo)
09:00
1043
(Invited) Ge/GeSn Processes and Transistor Applications
C. W. Liu (National Taiwan University, National Nano Device Laboratories), Y. S. Huang, F. L. Lu, and H. Y. Ye (National Taiwan University)
09:30
1044
Effect of Si/Sige Buried Gate with Strained Layers on N-Type Channel Properties
B. Lee (SK hynix Inc.), S. H. Song, I. H. Kim, and J. G. Park (Hanyang University)
09:50
1045
Evaluation of Laterally Graded Silicon Germanium Wires for Thermoelectric Devices Fabricated by Rapid Melting Growth
R. Yokogawa (Meiji University, JSPS Research Fellow), S. Hashimoto (Waseda University), K. Takahashi (Nagoya University, JSPS Research Fellow), S. Oba (Waseda University), M. Tomita (Waseda University, Meiji University), M. Kurosawa (Nagoya University, JST-PRESTO), T. Watanabe (Waseda University), and A. Ogura (Meiji University)
See more of: G03: SiGe, Ge, and Related Compounds: Materials, Processing, and Devices 8
See more of: Electronic Materials and Processing
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