Processing Materials and Integration of Damascene and 3D Interconnects 9

Monday, 1 October 2018: 11:20-12:20
Universal 15 (Expo Center)
Chairs:
Kazuo Kondo , T. Ritzdorf and Fred Roozeboom
11:20
1115
Reduction of Thermal Stress in Copper TSV due to Annealing by Low TEC Copper
V. Q. Dinh (Fine Feature Electrodeposition Research Laboratory, Kyoto University), K. Kondo (Osaka Prefecture University), and T. Hirato (Kyoto University)
11:40
1116
What Happens to Low TCE Copper with Annealing
K. Kondo (Osaka Prefecture University)
12:00
1117
Effect of Polystyrene-Sulfonate Surfactant on Reduction of Remaining Abrasives and Surface Roughness in Tungsten-Film Chemical-Mechanical-Polishing
E. B. Seo, S. Kim, J. Bae, S. Kim (Hanyang university), J. Park (UB materias Inc.), and J. G. Park (Hanyang University)
See more of: G05: Materials, Formulation, and Processes for Semiconductor, 2.5 and 3D Chip Packaging, and High Density Interconnection PCB
See more of: Electronic Materials and Processing
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