G05 Materials, Formulation, and Processes for Semiconductor, 2.5 and 3D Chip Packaging, and High Density Interconnection PCB

Lead Organizer: Wei-Ping Dow (National Chung Hsing University)

Co-organizers: Gangadhara Mathad (Semiconductor Tech. Consulting) , Kazuo Kondo (Osaka Prefecture University) , Masanori Hayase (Tokyo University of Science) , Mitsumasa Koyanagi (Tohoku University) , Fred Roozeboom (Eindhoven University of Technology, TNO-Holst Centre) , Rohan Akolkar (Case Western Reserve University) , Silvia Armini (IMEC) , Yasuhiko Takeno (Global Net Corp.) and Lingyun Wei (The Dow Chemical Company)

Monday, 1 October 2018

09:00-11:20


Semiconductor Process 1
Universal 15
Chair(s): Wei-Ping Dow, Masanori Hayase, Lingyun Wei, Kazuo Kondo, Fred Roozeboom, Gangadhara Mathad, Mitsumasa Koyanagi and Yasuhiko Takeno

11:20-12:20


Processing Materials and Integration of Damascene and 3D Interconnects 9
Universal 15
Chair(s): Kazuo Kondo, T. Ritzdorf and Fred Roozeboom

14:00-16:00


Semiconductor Process 2
Universal 15
Chair(s): Wei-Ping Dow, Kazuo Kondo, Lingyun Wei, Gangadhara Mathad, Mitsumasa Koyanagi, Fred Roozeboom and Yasuhiko Takeno

Tuesday, 2 October 2018

08:00-12:20


PCB Process
Universal 15
Chair(s): Wei-Ping Dow, Kazuo Kondo, Gangadhara Mathad, Mitsumasa Koyanagi, Fred Roozeboom, Lingyun Wei and Yasuhiko Takeno

13:00-18:00


2.5D or 3D Chip Packaging Process
Universal 15
Chair(s): Wei-Ping Dow, Masanori Hayase, Lingyun Wei, Kazuo Kondo, Fred Roozeboom, Gangadhara Mathad, Mitsumasa Koyanagi and Yasuhiko Takeno

18:00-20:00


G05 Poster Session
Universal Ballroom

Wednesday, 3 October 2018

09:00-11:20


Plasma Nanoscience and Nanotechnology 3
Universal 15
Chair(s): Dennis W. Hess and Oana Leonte