2053
Reliability Challenges of 3-D Stacked Chip Package With Through-Silicon-Via (Invited talk)
Reliability Challenges of 3-D Stacked Chip Package With Through-Silicon-Via (Invited talk)
Monday, October 28, 2013: 08:50
Union Square 21, Tower 3, 4th Floor (Hilton San Francisco Union Square)
Abstract:
- E7-2053 (7.2KB) - Abstract Text