Emerging Device Architectures-FINFETs/ETSOI/Nanowires

Tuesday, May 13, 2014: 09:00-12:00
Flagler, Ground Level (Hilton Orlando Bonnet Creek)
Vijay Narayanan and Kuniyuki Kakushima
(Invited) Material Engineering for 7nm FinFETs
V. Moroz, J. Huang, M. Choi, and L. Smith (Synopsys, Inc.)
(Invited) Challenges in Contact Technologies for Planar/Non-Planar Si Technologies
P. Adusumilli, E. Alptekin, and N. Breil (IBM Semiconductor Research and Development Center)
Back Gate Bias Stressing on Extremely Thin SOI (ETSOI) MOSFETs with Gate Last Process Integration
Z. Tang, B. Tang, L. Zhao, G. Wang, J. Xu, Y. Xu, H. Wang, D. Wang, J. Li, J. Yan, and C. Zhao (Institute of Microelectronics of Chinese Academy of Sciences)
(Invited) Effect of SOI Substrate on CMOS Devices Reliability (Cancelled)
Growth of the Manganese Silicide/Silicon Nanowire Heterostructures and Their Physical Properties
Y. S. Hsieh, C. W. Huang, C. H. Chiu (Department of Material science and engineering, National Chiao Tung University), K. C. Lu (Department of Materials Science and Engineering, National Cheng Kung University), and W. W. Wu (Department of Material science and engineering, National Chiao Tung University)