FEOL Materials and Process Technology

Jagannathan, Hemanth

Monday, 29 May 2017: 10:00-12:00

Churchill B2 (Hilton New Orleans Riverside)

Chair:

Hemanth Jagannathan

10:00

1252

(Invited) Gate-All-Around Transistors Based on Vertically Stacked Si Nanowires

H. Mertens, R. Ritzenthaler, A. Y. Hikavyy, M. S. Kim (imec), Z. Tao (Imec), K. Wostyn, T. Schram, E. Kunnen, L. Å. Ragnarsson, H. F. W. Dekkers, T. Hopf (imec), K. Devriendt (Imec), D. Tsvetanova, S. A. Chew, Y. Kikuchi, E. Van Besien (imec), E. Rosseel (Imec), G. Mannaert, A. De Keersgieter, A. Chasin, S. Kubicek, A. Dangol, S. Demuynck, K. Barla, D. Mocuta, and N. Horiguchi (imec)

10:40

1253

(Invited) Challenges for Ion Implantation in Power Device Processing

W. Schustereder (Infineon Technologies Austria AG)

11:20

1254

The Effect of Defects on Time Dependent Dielectric Breakdown Acceleration in TiN/ZrO₂/Al₂O₃/p-Ge Gate Stacks

Y. Ding, D. Misra (New Jersey Institute of Technology), K. Tapily (TEL Technology Centre, America, LLC), R. D. Clark (TEL Technology Center, America, LLC), S. Consiglio (TEL Technology Center), C. S. Wajda, and G. J. Leusink (TEL Technology Center, America, LLC)

11:40

1255

Argon Annealed ALD-ZrO₂/SiON Gate Stack for Advanced CMOS Devices

R. Gupta (University of Jammu), D. Saikia (Sibsagar College, Joysagar, Assam, India), and R. Vaid (University of Jammu)

See more of: G02: Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 7
See more of: Electronic Materials and Processing

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