FEOL Materials and Process Technology

Monday, 29 May 2017: 10:00-12:00
Churchill B2 (Hilton New Orleans Riverside)
Chair:
Hemanth Jagannathan
10:00
(Invited) Gate-All-Around Transistors Based on Vertically Stacked Si Nanowires
H. Mertens, R. Ritzenthaler, A. Y. Hikavyy, M. S. Kim (imec), Z. Tao (Imec), K. Wostyn, T. Schram, E. Kunnen, L. Å. Ragnarsson, H. F. W. Dekkers, T. Hopf (imec), K. Devriendt (Imec), D. Tsvetanova, S. A. Chew, Y. Kikuchi, E. Van Besien (imec), E. Rosseel (Imec), G. Mannaert, A. De Keersgieter, A. Chasin, S. Kubicek, A. Dangol, S. Demuynck, K. Barla, D. Mocuta, and N. Horiguchi (imec)
10:40
(Invited) Challenges for Ion Implantation in Power Device Processing
W. Schustereder (Infineon Technologies Austria AG)
11:20
The Effect of Defects on Time Dependent Dielectric Breakdown Acceleration in TiN/ZrO2/Al2O3/p-Ge Gate Stacks
Y. Ding, D. Misra (New Jersey Institute of Technology), K. Tapily (TEL Technology Centre, America, LLC), R. D. Clark (TEL Technology Center, America, LLC), S. Consiglio (TEL Technology Center), C. S. Wajda, and G. J. Leusink (TEL Technology Center, America, LLC)
11:40
Argon Annealed ALD-ZrO2/SiON Gate Stack for Advanced CMOS Devices
R. Gupta (University of Jammu), D. Saikia (Sibsagar College, Joysagar, Assam, India), and R. Vaid (University of Jammu)